Release Notes for STM32L0xx CMSIS

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# Release Notes for STM32L0xx CMSIS

Copyright 2014 STMicroelectronics

## Update History

### V1.1.0 / 18-June-2014

Main Changes

- Header files

- Add defines for memories base and end addresses: FLASH_END, DATA_EEPROM_BASE and DATA_EEPROM_END (instead of having them in stm32l0xx_hal_flash.h file)

- Peripheral register structures definition is aligned on 32 bit

- FLASH_SR_FWWER value fixed to 0x00020000 instead of 0x00010000

- Add missing EXTI register bits definition

- IMR and EMR registers: bits 18, 20, 26, 28, 29
- FTSR, RTSR, PR and SWIER registers: bits 20, 21, 22

- Update some bits definition to be in line with latest version of the Reference Manual

- Rename FLASH_SR_ENHV into FLASH_SR_ENDHV

- Rename SYSCFG_VREFINT_ADC_RDYF into SYSCFG_CFGR3_VREFINT_ADC_RDYF

- Rename ADC_SMPR_SMPR_xxx into ADC_SMPR_SMP_xxx

- Rename SYSCFG_CFGR3_VREFINT_ADC_RDYF into SYSCFG_VREFINT_ADC_RDYF
- Note: aliases has been added to keep compatibility with previous version

- system_stm32l0xx.c

- Use “__IO const” instead of “__I”, to avoid any compilation issue when __cplusplus switch is defined

### V1.0.1 / 24-April-2014

Main Changes

- Update gcc startup files.

### V1.0.0 / 22-April-2014

Main Changes

- First official release.

## License

Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:

1. Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
3. Neither the name of STMicroelectronics nor the names of its contributors may be used to endorse or promote products derived

from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

For complete documentation on STM32 Microcontrollers visit www.st.com/STM32